Zhenxing (Zane) Bi

Zane has experience in drafting and filing patent applications, as well as responding and appealing to the U.S. Patent and Trademark Office (USPTO). He has worked on reexaminations, inter partes reviews, and post grant review proceedings, including filing, strategizing, and evaluating likely outcomes of Patent Trial and Appeal Board (PTAB) filings involved in various diligence matters.

Prior to joining the legal industry, Zane worked as a research scientist at IBM Research beginning in 2013, led a cross-functional alliance team on key module process innovations and drove the logic Complementary Metal–Oxide–Semiconductor (CMOS) technology strategy to improve the semiconductor hardware performance. His team unveiled the world's first 7nm FinFET logic chip with SiGe channel and EUV lithography in 2015, and the world's first 5nm Gate-All-Around (GAA) transistor chip in 2017. Zane also worked at Los Alamos National Laboratory as a research associate on advanced integrated nanotechnology development from 2011 to 2013.

Zane was an IBM Master Inventor and holds more than 180 U.S. patents, 71 peer-reviewed journal articles, and 36 conference proceedings with a total citation over 4,000 times as of September 2023.